1. Field of the Invention
The present invention relates to data storage systems, and more particularly to routing non-data frames.
2. Background of the Invention
Fibre channel is a set of American National Standard Institute (ANSI) standards which provide a serial transmission protocol for storage and network protocols such as HIPPI, Small Computer Systems Interface (“SCSI”), IP, ATM and others. Fibre channel provides an input/output interface to meet the requirements of both channel and network users.
SCSI is commonly used to transfer information between a host computer system and a storage device (for example, a SCSI device). SCSI is an industry standard that defines a system level bus with intelligent controllers on each device to manage flow of information.
In a typical SCSI exchange, an initiator sends a “read” or “write” command to a target. For a read operation, the target sends the requested data to the initiator. For a write command, the target sends a “Ready to Transfer” response informing the initiator that the target is ready to accept the write data. The initiator then sends the write data to the target. Once the data is transferred, the exchange enters the response phase. The target then sends a response to the initiator with the status of the operation. Once the initiator receives this response, the exchange is complete.
In a typical fibre channel system, a host computer uses a host bus adapter (“HBA”) to transfer data from and to a host. Host adapters receive frames either from a host or from a fibre channel device (for example, a SCSI device) and then facilitate transfer of data.
In conventional systems, an HBA includes a single processor that analyzes every incoming frame, extract the required information to continue or terminate data exchange. Even if no action is required to process the frame, the processor must still analyze it. This slows the overall process of data transfer and is hence not desirable in today's systems where transfer and processing times must be efficient.
Therefore, what is required is a system that minimizes processor involvement if no substantive action is required by the HBA processor.